1. Field of the Invention
The present invention relates to semiconductor devices, and more particularly, to a method for fabricating a metal-insulator-metal (MIM) capacitor of a semiconductor device.
2. Discussion of the Related Art
MIM capacitors exhibit excellent supply voltage (Vcc) and mismatch characteristics and are generally designed to have capacitances of 1 fF/μm2. There is a trend toward higher capacitance requirements for MIM capacitors in fields such as analog-to-digital converters, switching capacitor filters, mixed signal technology, and radio frequency applications.
FIGS. 1-7 illustrate a related art method for fabricating a MIM capacitor.
As shown in FIG. 1, a lower metal electrode film pattern 120 is formed on a first insulating film 110 on a semiconductor 100. The lower metal electrode film pattern 120 is formed of Al. Next, as shown in FIG. 2, a second insulating film 130 is formed on the insulating film 110 and the lower metal electrode film pattern 120. A trench 131 formed in second insulating film 120 using a predetermined mask film partially exposes a surface of the lower metal electrode film pattern 120. A dielectric film 140 is formed on the second insulating film 130 and the lower metal electrode film pattern 120 exposed by the trench 131. The dielectric film 140 is formed of SiO2, Si3N4, or Ta2O3.
As shown in FIG. 3, a via hole 132 formed in the dielectric film 140 and the second insulating film 130 using a predetermined mask film partially exposes the surface of the lower metal electrode film pattern 120. As shown in FIG. 4, a barrier metal film 150 is formed on the entire surface, and an upper metal electrode film 160 is formed on the barrier metal film 150. The barrier metal film 150 is formed of Ti/TiN, and the upper metal electrode film 160 is formed of W.
As shown in FIG. 5, the upper metal electrode film 160, the barrier metal film 150 and the dielectric film 140 are planarized to expose the second insulating film 130, so that an upper metal electrode film pattern 161 and a via contact 162 are formed.
As shown in FIG. 6, a first metal line film 171 and a second metal line film 172 are formed. The first metal line film 171 and the second metal line film 172 are electrically connected with the upper metal electrode film pattern 161 and the via contact 162, respectively.
As shown in FIG. 7, the MIM capacitor is completed, in which the lower metal electrode film pattern 120 is arranged on the first insulating film 110. The trench 131 for the capacitor structure is spaced apart from the via contact 162 for a metal line of the lower metal electrode film pattern 120.
However, in the aforementioned related art method for fabricating a MIM capacitor, the trench 131 serving as the capacitor and the via hole 132 for the metal line of the lower metal electrode film pattern 120 are formed by separate photolithographic processes. In the related art, the process steps are increased. This increases cycle time and reduces an area of the capacitor, thereby deteriorating efficiency.